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Microstructure Optimization via Grain-Boundary Segregation to Enhance DC Bias Dielectric Performance of BaTiO3 Multilayer Ceramic Capacitors.

BaTiO₃‐based multilayer ceramic capacitors (MLCCs) are essential components in modern electronics. To enhance overall capacitance, achieving thinner ceramic layers has become a primary issue. However, this introduces two major challenges:… Click to show full abstract

BaTiO₃‐based multilayer ceramic capacitors (MLCCs) are essential components in modern electronics. To enhance overall capacitance, achieving thinner ceramic layers has become a primary issue. However, this introduces two major challenges: controlling grain size during processing and ensuring stability under high electric fields. In this study, a novel strategy employing single‐element additives such as Fe3⁺ and Ni2⁺ is presented to effectively suppress grain growth. These additives strongly segregate at grain boundaries, thereby limiting grain coarsening during sintering and enabling fine‐grained microstructures. The optimized BaTiO₃ samples, free of costly rare‐earth elements, exhibit stable high permittivity (≈103), low dielectric loss, and improved reliability across varying temperatures and frequencies. More importantly, we identify the ideal grain size of ≈200 nm for maximizing capacitance under a DC bias exceeding 4 V µm−1. The findings suggest that further reducing the dielectric layer thickness to 200 nm represents a promising direction for future MLCCs.

Keywords: multilayer ceramic; ceramic capacitors; optimization via; microstructure optimization; bias; grain

Journal Title: Advanced materials
Year Published: 2025

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