LAUSR

Reliable circuits help prevent artificial intelligence (AI) systems from being corrupted by the soft errors occurred in memories or combinational circuits, which promotes the development of AI security. However, it is a great challenge to measure the reliability of combinational circuits at register transfer level (RTL) rapidly and efficiently. In this paper, a new fast and accurate computational model based on stochastic computation (SC) is presented to meet these objectives. In the proposed approach, the circuit netlists at RTL are parsed to satisfy the requirements of SC on the bitstream structure of the circuits, and then a Sobol sequence‐based algorithm for generating uniform non‐Bernoulli sequences is built to reduce the random fluctuations occurred in probability calculations. After that, an adaptive algorithm based on a MAX–MIN ant system is constructed using graphics processing unit‐based parallel schemes to greatly accelerate the calculation. The experimental results validate our proposed technique, showing that this approach was approximately 51 and 42 times faster than the traditional SC approach and the stochastic computational model (SCM), respectively; its required sequence length was approximately 1.66 times shorter than that of the traditional SC approach, and its relative error was two times smaller than that of the SCM.