LAUSR

In the literature, a number of two-stage class-E power amplifiers have been reported for wireless sensor network (WSN) applications. However, they suffer from the requirement of larger silicon area, inductors with high quality factor, large number of off-chip decoupling capacitors, high input power, voltage stress handling capability and efficiency degradation due to finite on-resistance and surplus capacitance of switching transistors. In order to overcome these limitations and to enhance the power added efficiency, two novel two-stage class-E power amplifiers denoted as PA1 and PA2 are proposed in this paper. Both the amplifiers use a driver amplifier with capacitive feedback and pi-matching at the input. PA1 uses a main amplifier with negative-capacitance cascode topology. PA2 uses a diode connected NMOS auxiliary transistor with RC source degeneration in the driver amplifier, negative-capacitance cascode configuration with a parallel LC-tuning circuit in the main amplifier. To evaluate the efficacy of these circuits, the proposed power amplifiers are implemented in UMC 0.18-µm standard RFCMOS process with the supply voltage of 3.0 V and the operating frequency of 2.45 GHz and studied through post-layout simulation using Cadence Virtuoso (IC616) Analog Design Environment. From this study, it is found that the proposed power amplifiers have the power added efficiency of (45.02 %, 54.87 %), the saturated output power at 1-dB compression point (P1-dB) of (21.52 dBm, 23.17 dBm), the power gain of (27.29 dB, 28.74 dB) and the output referred intercept point (OIP3) of (19.41 dBm, 22.67 dBm), respectively. Both of these power amplifiers have higher figure of merit (FoM) of (53.80, 57.98) when compared to other reported works. It is observed that the proposed power amplifiers are suitable to operate under low input power of -8 dBm and hence it meets the requirement of WSN applications.