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Comparison of the performance improvement for the two novel SOI-tunnel FETs with the lateral dual-gate and triple-gate

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In this paper, we present two silicon-on-insulator tunnel field-effect transistors (SOI-TFETs), referred as a lateral dual-gate TFET and a lateral triple-gate TFET, which consist of one or two vertical thin vertical dielectric… Click to show full abstract

In this paper, we present two silicon-on-insulator tunnel field-effect transistors (SOI-TFETs), referred as a lateral dual-gate TFET and a lateral triple-gate TFET, which consist of one or two vertical thin vertical dielectric layers within the original front-gate region and form the separate dual-gate or triple-gate structure. Using calibrated two-dimensional Synopsys Sentaurus TCAD simulation, we demonstrate that the proposed novel TFETs have relatively higher Ion and significantly lower Ioff due to the modulating effect of the multiple gate voltages on the channel barrier. We also compare and analyze improvements in Ion/Ioff for the two novel SOI-TFETs and a conventional SOI-TFET. The proposed new TFETs exhibit a high Ion/Ioff ratio of 104 ~ 108 for a channel length of 22 nm. Our results reveal that the performance of the lateral triple-gate TFET is superior to that of the dual-gate TFET, yielding higher on-state current and lower off-state current.

Keywords: gate tfet; triple gate; gate; gate triple; dual gate; lateral dual

Journal Title: Microsystem Technologies
Year Published: 2018

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