LAUSR

This paper proposes a design approach for pseudo-parallel sigma-delta modulator as part of an analog-to-digital converter for monolithic energy measurement systems. The main requirements for this application are a resolution of 16 bits and a bandwidth ranging from 40 to 2 kHz. The design was optimized at system level to attain maximum SNR using minimum capacitance values so that speed requirements of the analog blocks could be alleviated in order to reduce power consumption. At circuit level, low power design techniques, such as adaptive bias operational transconductance amplifiers and clocked comparators were applied. The circuit was developed for realization in a 180 nm CMOS process technology.