AbstractA double-gate (DG) heterojunction tunnel FinFET structure with a source overlap region was analyzed to optimize its performance and validate technology computer-aided design (TCAD) simulation results by modeling the surface… Click to show full abstract
AbstractA double-gate (DG) heterojunction tunnel FinFET structure with a source overlap region was analyzed to optimize its performance and validate technology computer-aided design (TCAD) simulation results by modeling the surface potential, electric field, and threshold voltage. A compact model of the surface potential was developed by applying the solution of the two-dimensional (2-D) Poisson equation obtained using the superposition technique. The gate threshold voltage was extracted by using the transconductance change method. The effect of high-k dielectric material (HfO2) on the surface potential model was also addressed. The analytical predictions were compared with and validated against the results obtained using Synopsys TCAD software, revealing excellent agreement. The percentage error of the analytical approach for the threshold voltage was also evaluated with respect to the TCAD simulation results.
               
Click one of the above tabs to view related content.