LAUSR

We present a two-dimensional (2-D) analytical modeling of the surface potential of a double-gate vertical t-shaped tunnel field-effect transistor (TFET), considering the inherit dual modulation effect in such devices. This effect explains the control of the surface potential by both bias voltages, which are used to calculate the tunneling depletion width at the source and drain junctions. A model of the tunneling current in the device is derived based on the surface-potential model. The parabolic approximation is used to solve the 2-D Poisson equation with appropriate boundary conditions. The dependence of the surface potential profile on different parameters is analyzed by varying the gate–source potential, drain–source potential, gate oxide dielectric constant, gate metal work function, and different materials used. Finally, expressions for the surface potential of the channel along with the tunneling current are obtained, accurately capturing their variation with the gate and drain biases. The proposed method is verified by the agreement between its analytical results and technology computer-aided design (TCAD) simulation results.