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The design, analysis, and cost estimation of a generic adder and subtractor using the layered T (LT) logic reduction methodology with a quantum-dot cellular-automata-based approach

The quantum-dot cellular automata (QCA) is considered to be one of the ground-breaking nanotechnologies developed over the last two decades. A layered T (LT) logic cell library is constructed herein,… Click to show full abstract

The quantum-dot cellular automata (QCA) is considered to be one of the ground-breaking nanotechnologies developed over the last two decades. A layered T (LT) logic cell library is constructed herein, and the methodology is extended to generic adder and subtractor module designs. The two proposed algorithms lead to more efficient QCA layout designs for an n-bit ripple carry adder (RCA) and subtractor based on an effective clock zone assignment approach. The suggested one-, four-, and eight-bit RCAs and subtractors surpass most of their existing counterparts by offering lower effective area and cell complexity. A comparative analysis is presented regarding the complexity, irreversible power dissipation, and CostĪ± of the proposed n-bit layouts from a cost estimation purview.

Keywords: methodology; quantum dot; adder; cost; subtractor; dot cellular

Journal Title: Journal of Computational Electronics
Year Published: 2021

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