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Robust tuning of Kirkendall void density in circuit interconnections through substrate strain annealing

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Unpredictable Kirkendall void formation at the interface of circuit interconnections underlies degradation in electronics, yet there is a lack of effective approaches to curb the amount of these voids. In… Click to show full abstract

Unpredictable Kirkendall void formation at the interface of circuit interconnections underlies degradation in electronics, yet there is a lack of effective approaches to curb the amount of these voids. In this paper, we developed a modified strain-anneal method to tailor grain size distributions in the copper substrate of interconnections by inhomogeneous recrystallization, and demonstrate quantitatively that not only the removal of the impurities but also an increase in the grain size of the substrates leads to an appreciable decline in the void density. The interconnections on the substrate recrystallized at a high annealing temperature show the massive porosity and the increased sensitivity of the voiding to the grain size. Our results highlight an example of how grain size of substrates can be tailored to enable manipulation of void propensity in hetero-interfaces, and suggest a promising strategy for high-stability circuit bonding in electronics, particularly in high temperature/high power electronic devices based on wide band gap semiconductors.

Keywords: interconnections substrate; circuit interconnections; circuit; void density; grain size; kirkendall void

Journal Title: Journal of Materials Science: Materials in Electronics
Year Published: 2018

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