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Dependency of well-contact density on MCUs in 65-nm bulk CMOS SRAM

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Dear editor, In custom static random access memory (SRAM) cell, radiation-induced single bit upsets (SBUs) are considered as the main cause of soft error [1]. Advanced technologies and scaling down… Click to show full abstract

Dear editor, In custom static random access memory (SRAM) cell, radiation-induced single bit upsets (SBUs) are considered as the main cause of soft error [1]. Advanced technologies and scaling down of feature sizes have made single-event multiple cell upsets (MCUs) as the vital source of soft error for SRAM [2]. Moreover, under certain single particle hitting conditions, single event transient (SET) at periphery circuit and single event latchup (SEL) appearing in the circuit, can affect MCU as well [3]. MCU induced by single event effect, which may cause SRAM logical confusion and subsequently permanent failure, has been widely reported. Therefore, it is important to study the hardening technique to mitigate MCU on SRAM radiation-induced bipolar effects dominantly induce MCU [4], and MCU rate depends on wellcontact density. Well-contact structure is widely used in SRAM owing to its capability to keep the well potential stable and avoid well potential collapse. Thus, high density of well-contacts can greatly decrease MCU occurrence in SRAM.

Keywords: mcu; well contact; density; sram; single event

Journal Title: Science China Information Sciences
Year Published: 2017

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