LAUSR

We report results on the interface trap density (Dit) of 4H- and 6H-SiC metal–oxide–semiconductor (MOS) capacitors with different interface chemistries. In addition to pure dry oxidation, we studied interfaces formed by annealing thermal oxides in NO or POCl3. The Dit profiles, determined by the C–ψs method, show that, although the as-oxidized 4H-SiC/SiO2 interface has a much higher Dit profile than 6H-SiC/SiO2, after postoxidation annealing (POA), both polytypes maintain comparable Dit near the conduction band edge for the gate oxides incorporated with nitrogen or phosphorus. Unlike most conventional C–V- or G–ω-based methods, the C–ψs method is not limited by the maximum probe frequency, therefore taking into account the “fast traps” detected in previous work on 4H-SiC. The results indicate that such fast traps exist near the band edge of 6H-SiC also. For both polytypes, we show that the total interface trap density (Nit) integrated from the C–ψs method is several times that obtained from the high–low method. The results suggest that the detected fast traps have a detrimental effect on electron transport in metal–oxide–semiconductor field-effect transistor (MOSFET) channels.