LAUSR

In this paper, performance of very large-scale integrated circuits using tunneling field-effect transistors with graphene nanoribbons doped in the P-I-N formed as a channel with dimensions less than 10 nm is investigated. First, we achieved an appropriate structure with conventional voltage characteristics by setting parameters of these nano—transistors. Then, using derived transistor behavior curves, values in the library of field-effect transistors were set in such a way that the two curves fit each other. Then, by comparing the obtained gates with the common logical gates, we showed these nano-transistors exhibit higher speed and lower power consumption, so that the emission delay in the new transistors decreased by 5–79%.