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Trap and 1/f-noise effects at the surface and core of GaN nanowire gate-all-around FET structure

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AbstractUsing capacitance, conductance and noise measurements, we investigate the trapping behavior at the surface and in the core of triangular-shaped one-dimensional (1D) array of GaN nanowire gate-all-around field effect transistor… Click to show full abstract

AbstractUsing capacitance, conductance and noise measurements, we investigate the trapping behavior at the surface and in the core of triangular-shaped one-dimensional (1D) array of GaN nanowire gate-all-around field effect transistor (GAA FET), fabricated via a top-down process. The surface traps in such a low dimensional device play a crucial role in determining the device performance. The estimated surface trap density rapidly decreases with increasing frequency, ranging from 6.07 × 1012 cm−2·eV−1 at 1 kHz to 1.90 × 1011 cm−2·eV−1 at 1 MHz, respectively. The noise results reveal that the power spectral density increases with gate voltage and clearly exhibits 1/f-noise signature in the accumulation region (Vgs > Vth = 3.4 V) for all frquencies. In the surface depletion region (1.5 V < Vgs < Vth), the device is governed by 1/f at lower frequencies and 1/f2 noise at frequencies higher than ~ 5 kHz. The 1/f2 noise characteristics is attributed to additional generation–recombination (G–R), mostly caused by the electron trapping/detrapping process through deep traps located in the surface depletion region of the nanowire. The cutoff frequency for the 1/f2 noise characteristics further shifts to lower frequency of 102–103 Hz when the device operates in deep-subthreshold region (Vgs < 1.5 V). In this regime, the electron trapping/detrapping process through deep traps expands into the totally depleted nanowire core and the G–R noise prevails in the entire nanowire channel.

Keywords: surface core; gan nanowire; noise; nanowire gate; gate around; core

Journal Title: Nano Research
Year Published: 2019

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