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Performance Investigation of Silicon-on-Insulator Junctionless Drain Extended FinFET for High Power, Radio Frequency Applications

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This research article explores the scope of Silicon-On-Insulator (SOI) Junctionless (JL) Drain Extended (De) FinFET and compared it with Conventional SOI Drain Extended FinFET (Conv. SOI DeFinFET) for high power… Click to show full abstract

This research article explores the scope of Silicon-On-Insulator (SOI) Junctionless (JL) Drain Extended (De) FinFET and compared it with Conventional SOI Drain Extended FinFET (Conv. SOI DeFinFET) for high power and high frequencies applications. The device simulation is performed by three dimensional (3D) simulations by sentaurus TCAD tool to optimize the device parameters at 14 nm gate length including the height (Hfin), the width (Wfin) and channel doping (Nch) of the fin of both devices. Both devices are compared in terms of drain current (DC) characteristics (breakdown voltage, on-resistance and drain current) and radio frequency (RF) characteristics (trans-conductance, current gain, cut-off frequency, power gain and maximum operating frequency). The results reveal that the proposed JL SOI DeFinFET is also one of the contenders with Conv. SOI DeFinFET for the regime of high power and high frequency.

Keywords: high power; frequency; drain extended; drain; extended finfet

Journal Title: Silicon
Year Published: 2020

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