LAUSR

Abstract This paper presents a flexible ferroelectric random access memory (FeRAM) cell with a one-transistor-one-transistor structure. The FeRAM cell was composed of a control transistor (CT) and an omega-shaped ferroelectric memory transistor (MT). An inkjet-printed single-walled carbon nanotube (SWCNT) were utilized as a semiconducting channel layers of both transistors. An omega-shaped ferroelectric gate was formed through inkjet-printing of poly(vinylidene fluoride-co-trifluoroethylene) (P(VDF-TrFE)) onto the SWCNT channel of the MT. The gate electrode of the CT was electrically connected to the drain electrode of the MT, while the gate electrode of the MT was connected to the source electrode of the CT. The 1T1T architecture enabled the separation of the writing and reading operations, which afforded nondestructive readout capability. The desired multi-level conductance states could be deterministically controlled by tuning the dipole polarization in the ferroelectric P(VDF-TrFE) layer of the MT. The resulting FeRAM cell showed excellent device performances such as five-level data storage, a high programming/erasing current ratio (>105), a retention time (>104 s), and operational stability (>1000 cycles). The 1T1T FeRAM cell fabricated by inkjet printing technique opens up new opportunities for realizing future large-area flexible memory cells.