LAUSR

Abstract Optical face detection and recognition system (FDRS) is widely used in modern biometric security systems. In this paper, we implement a new model of FDRS to identify human faces under different poses. Particularly, we propose the Viola-Jones detector to locate and detect human faces and the VanderLugt correlator (VLC) technique for identification. Despite its extensive use, the VLC technique still requires design implementation efforts. This disadvantage is primarily due to the intensive computation required by the VLC technique. In our work, we propose three implementations (the first one is software and the last both are Hw/Sw co-design) on low-end-low-cost Xilinx Zync SOC that integrates both an ARM Cortex-A9 processor and an FPGA into a single device. In the software approach, we propose an implementation based on the ARM Cortex-A9 processor using OpenCV library. For the first Hw/Sw approach, we propose a co-design based on a hybrid ARM-FPGA platform, where the traditional hardware VLC architecture processed on FPGA. To respect real-time constraints, we developed an optimized hardware VLC architecture processed on FPGA to realize the second Hw/Sw co-design. A set of experiments has been considered using the PHPID database where the faces ranging from -30° to +30°. The experimental result showed that the optimized hardware VLC architecture provides a speedup of 4.4x compared to the non-optimized traditional hardware VLC architecture, and a speed-up of 39.22x compared to the software implementation. Finally, from a functional point-of-view, the recognition ratios obtained from both Hw/Sw co-designs are comparable to those obtained using software implementation.