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The effect of AlN nucleation temperature on inverted pyramid defects in GaN layers grown on 200 mm silicon wafers

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Abstract We have examined 200 mm GaN on silicon wafers, while varying the AlN nucleation temperature, and have found that higher temperatures result in a more convex bow on the wafers.… Click to show full abstract

Abstract We have examined 200 mm GaN on silicon wafers, while varying the AlN nucleation temperature, and have found that higher temperatures result in a more convex bow on the wafers. In addition, by performing full wafer defect mapping, we have found that a higher nucleation temperature results in a higher density of inverted pyramid defects, which have previously been found to reduce the breakdown voltage of GaN on silicon layers. We have performed electrical measurements on a wafer with the lowest temperature AlN layer, which is still within our bow specification, and which therefore has the lowest density of inverted pyramid defects. This wafer showed the same leakage current density for both very small and very large test structures (2×10 −3 and 18.7 mm 2 respectively), with all but one of our large structures maintaining a breakdown voltage greater than 700 V. This is a very promising result for high yield of devices on 200 mm GaN on silicon wafers.

Keywords: inverted pyramid; temperature; pyramid defects; silicon wafers; nucleation temperature

Journal Title: Journal of Crystal Growth
Year Published: 2017

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