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Runtime performance evaluation and optimization of type-2 hypervisor for MIPS64 architecture

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Abstract Over the last decade, virtualization technologies have seen unprecedented growth in the system-level domain and promptly have moved to the embedded system domain. While there are numerous applications of… Click to show full abstract

Abstract Over the last decade, virtualization technologies have seen unprecedented growth in the system-level domain and promptly have moved to the embedded system domain. While there are numerous applications of virtualization for off-the-shelf hardware such as security, sandboxing, testing tools, etc. However, there are few open-source virtualization solutions available for embedded systems. For real-time virtualization, good runtime performance is a deterministic factor for its practical use in the embedded domain. In this paper, the internal architecture of HTTM (an open-source type-2 hypervisor for MIPS64 architecture) was thoroughly analyzed. ISA virtualization unit and execution cycle control were two primary units that were profiled and explored for optimization. Dynamic Binary Translation (DBT) unit was modified to generate highly efficient code. While the reduction in switching between the translated code and management layer improved the overall execution cycle. The implementation of these strategies resulted in a 72–91% improvement in bandwidth benchmarks. Similarly, latency benchmarks show a 2–92% improvement from its vanilla version. Collectively producing an overall 1–5 times the improvement in execution time. The performance of optimized HTTM is also compared with Quick Emulator (QEMU). HTTM performs 44–80% better than QEMU in bandwidth benchmarks while QEMU performs better in latency operations.

Keywords: type hypervisor; virtualization; performance; runtime performance; hypervisor mips64; architecture

Journal Title: Journal of King Saud University - Computer and Information Sciences
Year Published: 2019

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