LAUSR

In this work the serial combination of two RRAM cells is studied for the generation of a random bit. Measurements confirm that a serial reset operation, in which one of the two RRAMs switches to the high resistance state, is an unpredictable and random process. Furthermore, the same device switches during subsequent set and reset operations. This behavior paves the way for the application of this configuration for hardware security purposes. Display Omitted A cell composed of the serial combination of two RRAMs is experimentally evaluated.During a first serial reset, one of the RRAMs unpredictably switches its state.The switching of the same RRAM persists for subsequent serial set/reset operations.This unpredictable behavior is the source for the generation of random bits.This cell can be leveraged for the implementation of Physical Unclonable Functions.