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Self-aligned gate-last process for quantum-well InAs transistor on insulator

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Abstract This paper presents a promising technology to make quantum-well InAs transistors on SiO2/Si substrate by using a self-aligned gate-last fabrication technique. The full self-aligned fabrication process is demonstrated, and… Click to show full abstract

Abstract This paper presents a promising technology to make quantum-well InAs transistors on SiO2/Si substrate by using a self-aligned gate-last fabrication technique. The full self-aligned fabrication process is demonstrated, and the fabricated device is characterized. A 2-D TCAD simulation is then performed based on the experimental data to understand the operation of the InAs transistors. We explore further optimizations for this technology through TCAD simulations, and it is found that with optimizations in materials, device geometry and fabrication, significant boost in RF performances is possible with these devices.

Keywords: gate last; self aligned; well inas; aligned gate; quantum well

Journal Title: Microelectronic Engineering
Year Published: 2018

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