LAUSR

Abstract SiC Mosfet has very unique properties in extreme operation such as a well-known fail-to-short failure mode but in competition with a lesser known fail-to-open failure mode. These two modes are generally studied and modelled separately, whereas, in practice, they are coupled with the junction temperature of the chip. This paper presents a circuit-type modelling approach of these two modes simultaneously. This modelling allows to simulate the selectivity and competition between these two modes, one is clearly critical and the other is advantageously safe. The proposed model is then compared with short-circuit test of 1.2 kV-80 mΩ MOSFET SiC.