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Abstract Analyzing transient ESD device behavior with TLP equipment requires more attention for implementation and measurement details than the classical quasi-static TLP approach. Minimizing hardware parasitics reduces the de-embedding effort… Click to show full abstract
Abstract Analyzing transient ESD device behavior with TLP equipment requires more attention for implementation and measurement details than the classical quasi-static TLP approach. Minimizing hardware parasitics reduces the de-embedding effort and optimizes the quality of the voltage and current measurements. We explore different methods and hardware options and highlight potential pitfalls.
Keywords:
analysis tlp;
tlp;
transient response;
pitfalls transient;
response analysis
Journal Title: Microelectronics Reliability
Year Published: 2021
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Journal Title: Microelectronics Reliability
Year Published: 2021
Link to full text (if available)
Share on Social Media: Sign Up to like & get
recommendations!