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Design of MSD multiplier for ternary optical computer processor based on minimum module

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Abstract In view of the inefficiency of multi-digit multiplication in the current Ternary Optical Computer (TOC), it is difficult to achieve fast multiplication. Based on the one-step MSD (Modified Signed-Digit)… Click to show full abstract

Abstract In view of the inefficiency of multi-digit multiplication in the current Ternary Optical Computer (TOC), it is difficult to achieve fast multiplication. Based on the one-step MSD (Modified Signed-Digit) adder, M operator, MSD multiplication principle and divide and conquer strategy, the 4-bit minimum module is designed and implemented, which can perform 4-bit multiplication. Besides, multiple minimum modules can perform operations in parallel. Based on which, the expansion scheme is proposed to achieve fast multiplication without digit limitation. This paper elaborates on the design principle, operation steps, optical path structure and expansion scheme of the 4-bit minimum module. The MSD multiplier based on the minimum module (MMM) is compared with the existing optical multiplier and the multiplier of electronic computer in the same type in terms of computational time complexity. The results show that the MMM is better than the other multipliers in the processing of multi-digit multiplication. It can give full play to the main advantages of TOC, which are giant data-bits parallel computing and reconfigurable processor, and it has more practical application significance.

Keywords: multiplier; msd; computer; multiplication; minimum module

Journal Title: Optics Communications
Year Published: 2019

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