LAUSR

Abstract In this paper, a heterojunction-based SiC double trench MOSFET (HJ-DTMOS) is proposed to improve its switching performance and the reverse recovery characteristic. In the HJ-DTMOS, a n+p− polysilicon junction is introduced in both the gate trench and the source trench. For the source trench, the heterojunction formed by the p− polysilicon layer and drift silicon carbide layer functions as a body diode in parallel with the device which shows a significant reduction in term of the reverse recovery charge and the on-state voltage. The n+p− junction in the gate trench introduces an additional depletion capacitance between the gate electrode and the drain electrode, which efficiently reduces the total Cgd, thus reducing the switching loss of the HJ-DTMOS. Simulation results show that the proposed new device is preferred in high-frequency and high-efficiency power applications.