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Effectively reducing the switching voltages based on CdS/ZnO heterostructure for resistive switching memory

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Abstract Due to the two-terminal structure, non-destructive read and high integrable density, resistive switching random access memory (RRAM) has attracted much attention for its potential applications in semiconductor industry. Unfortunately,… Click to show full abstract

Abstract Due to the two-terminal structure, non-destructive read and high integrable density, resistive switching random access memory (RRAM) has attracted much attention for its potential applications in semiconductor industry. Unfortunately, the unexpected failure behaviour is an obstacle for further applications. In our previous work, the CdS inter-layer was used to successfully suppress the failure behaviour in Cu2O based memory cell. However, the switching voltages are still too high and need to be significantly reduced for further applications. In this work, the CdS/ZnO heterostructure is exploited to effectively reduce the switching voltages. Compared to the CdS/Cu2O based device, the switching voltages in Pt/CdS/ZnO/FTO cell are effectively reduced. The Pt/CdS/ZnO/FTO cell also exhibits remarkable resistive switching and stable data retention characteristics. This work proposes a feasible way to effectively optimize the RRAM devices for future applications.

Keywords: memory; resistive switching; zno heterostructure; cds zno; switching voltages

Journal Title: Solid-State Electronics
Year Published: 2019

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