LAUSR

The major trend in microelectronics industry is driven by miniaturization and the increase in functionality [1]. According to root cause analysis from determined failures it is often found that failures in microelectronic components are often triggered by various thermal and mechanical loadings during industrial manufacturing processes like the backend of line (BEOL) processes. Here, singleand/or multiple metal layers or structures are deposited mainly on Si-substrates. These processes, due to the combination of different materials, temperature and topologies, cause residual stresses and may induce defects, which affect interface integrity and eventually cause failures of the device during application. This heavily concerns for example 3D integrated microelectronic devices, power electronics, micromechanical devices, sensors, etc. However, it is a great challenge to understand (1) the complex interplay between thin film combinations, (2) resulting residual stresses, (3) interface properties and (4) fracture behavior.