Printed component sizes in electronic circuits are approaching 10 nm, but inherent variability in feature alignment during photolithography poses a fundamental barrier for continued device scaling. Deposition-based self-aligned patterning is… Click to show full abstract
Printed component sizes in electronic circuits are approaching 10 nm, but inherent variability in feature alignment during photolithography poses a fundamental barrier for continued device scaling. Deposition-based self-aligned patterning is being introduced, but nuclei defects remain an overarching problem. This work introduces low-temperature chemically self-aligned film growth via simultaneous thin film deposition and etching in adjacent regions on a nanopatterned surface. During deposition, nucleation defects are avoided in nongrowth regions because deposition reactants are locally consumed via sacrificial etching. For a range of materials and process conditions, thermodynamic modeling confirms that deposition and etching are both energetically favorable. We demonstrate nanoscale patterning of tungsten at 220 °C with simultaneous etching of TiO2. Area selective deposition (ASD) of the sacrificial TiO2 layer produces an orthogonal sequence for self-aligned patterning of two materials on one starting pattern, i.e., TiO2 ASD on SiO2 followed by W ASD on Si-H. Experiments also show capacity for self-aligned dielectric patterning via favorable deposition of AlF3 on Al2O3 at 240 °C with simultaneous atomic layer etching of sacrificial ZnO. Simultaneous deposition and etching provides opportunities for low-temperature bottom-up self-aligned patterning for electronic and other nanoscale systems.
               
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