Photonic integrated circuits (PICs) enable the miniaturization of optical quantum circuits because several optic and electronic functionalities can be added on the same chip. Integrated single photon emitters (SPEs) are… Click to show full abstract
Photonic integrated circuits (PICs) enable the miniaturization of optical quantum circuits because several optic and electronic functionalities can be added on the same chip. Integrated single photon emitters (SPEs) are central building blocks for such quantum photonic circuits. SPEs embedded in 2D transition metal dichalcogenides have some unique properties that make them particularly appealing for large-scale integration. Here we report on the integration of a WSe2 monolayer onto a Silicon Nitride (SiN) chip. We demonstrate the coupling of SPEs with the guided mode of a SiN waveguide and study how the on-chip single photon extraction can be maximized by interfacing the 2D-SPE with an integrated dielectric cavity. Our approach allows the use of optimized PIC platforms without the need for additional processing in the SPE host material. In combination with improved wafer-scale CVD growth of 2D materials, this approach provides a promising route towards scalable quantum photonic chips. Integration of photonic circuits with single photon emitters provides a promising route towards scalable quantum photonic chips. Here, the authors integrate a WSe2 monolayer onto a SiN chip and demonstrate the coupling of single photon emitters in WSe2 with the guided mode of a SiN waveguide.
               
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