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Design of CMOS-compatible metal–insulator–metal metasurfaces via extended equivalent-circuit analysis

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Photonic metasurfaces compatible with large-scale production such as CMOS are of importance because they promise cointegration of electronics with photonics for detection, communication and sensing. The main challenges on the… Click to show full abstract

Photonic metasurfaces compatible with large-scale production such as CMOS are of importance because they promise cointegration of electronics with photonics for detection, communication and sensing. The main challenges on the way of designing such metasurfaces are: (1) large variety of possible geometrical shapes of metasurface elements that makes finding the most appropriate shape difficult; (2) poor compatibility of available electronic layer stacks with photonics. In this paper we show how to address both of these challenges utilizing extended equivalent-circuit analysis. In a first step we classify the behavior of different metasurfaces using the equivalent circuit. We discover that metasurfaces that use inverted-dipole resonator type exhibit higher tolerance to dielectric spacer thickness, higher angular stability and have similar resonance quality-factor as other types. In the second step we utilize the equivalent-circuit scheme to efficiently optimize the parameters of inverted-dipole based metasurfaces for a layer stack such as given in a CMOS process. Finally, as an example we demonstrate how an inverted-cross structure can be adapted to a commercial 110 nm CMOS process with Al metal layers. We measured peak absorption above 90% at center wavelength around 4 µm with quality factor of approximately 5 and angular stability larger than 60°.

Keywords: metal; circuit analysis; equivalent circuit; extended equivalent

Journal Title: Scientific Reports
Year Published: 2020

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