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Chip implementation of a new hyperchaotic oscillator

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A new four-dimensional hyperchaotic oscillator is proposed. Non-linear dynamic analysis of the hyperchaotic oscillator is presented. Furthermore, an analogue circuit of the hyperchaotic oscillator is implemented on a chip for… Click to show full abstract

A new four-dimensional hyperchaotic oscillator is proposed. Non-linear dynamic analysis of the hyperchaotic oscillator is presented. Furthermore, an analogue circuit of the hyperchaotic oscillator is implemented on a chip for some relevant engineering applications such as information encryption. The entire chip area occupies 0.69 × 0.84 mm in 0.35 μm CMOS process with power dissipation of 475 mW from a 3.3 V supply voltage.

Keywords: new hyperchaotic; oscillator; hyperchaotic oscillator; implementation new; chip implementation

Journal Title: Electronics Letters
Year Published: 2017

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