LAUSR

Parallel inverters have the advantages of low‐output harmonics and high‐parallel power, making them very suitable as the topology structure for an electric motor emulator. However, parallel inverters can also bring about circulating current issues, especially when using carrier phase shifted sinusoidal PWM (CPS‐SPWM) control mode, which significantly increases circulating current, leading to increased output harmonics and losses in the system. In order to suppress circulating currents, this paper provides a detailed analysis from both high‐frequency and low‐frequency perspectives in CPS‐SPWM control mode. A circulating current suppression method that combines hardware and software systems, adopting a cascaded coupled output network structure along with a corresponding error voltage space vector control method to achieve circulating current suppression, is proposed. By constructing a 6‐branch parallel output experimental platform, the feasibility and effectiveness of the proposed method have been verified, suppressing current circulating currents and improving current quality.