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Positive temperature dependence of time-dependent breakdown of GaN-on-Si E-mode HEMTs under positive gate stress

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We report an extensive analysis of the time-dependent breakdown of E-mode GaN-on-Si power HEMTs subjected to positive gate stress and demonstrate that TTF (time-to-failure) has a positive temperature dependence. The… Click to show full abstract

We report an extensive analysis of the time-dependent breakdown of E-mode GaN-on-Si power HEMTs subjected to positive gate stress and demonstrate that TTF (time-to-failure) has a positive temperature dependence. The analyzed devices have a p-type gate; large (60 A) power transistors were subjected to positive stress at different voltages and temperatures ranging from 25 °C to 250 °C. The original results collected in this paper demonstrate that (i) constant voltage stress induces a gradual decrease in gate leakage current, which is ascribed to hole-trapping in Mg-acceptors located at the p-GaN/AlGaN interface; (ii) this trapping process becomes less pronounced at high temperatures, due to a faster detrapping from the shallow Mg-related traps; (iii) the devices stressed at the same voltage and different temperatures show a similar initial gate leakage, due to the fact that in the analyzed regime, gate conduction is dominated by Fowler-Nordheim tunneling, a field-related, rather than thermally activated, process; (iv) the time-to-failure has a positive temperature dependence. The latter result is explained by considering that time-dependent breakdown occurs due to the accumulation of positive charges at the p-GaN/AlGaN interface, which results in an increased injection of 2DEG electrons into the p-GaN layer, where they are accelerated by the electric field. High temperatures favor the detrapping of holes, thus reducing this process and leading to a better stability.We report an extensive analysis of the time-dependent breakdown of E-mode GaN-on-Si power HEMTs subjected to positive gate stress and demonstrate that TTF (time-to-failure) has a positive temperature dependence. The analyzed devices have a p-type gate; large (60 A) power transistors were subjected to positive stress at different voltages and temperatures ranging from 25 °C to 250 °C. The original results collected in this paper demonstrate that (i) constant voltage stress induces a gradual decrease in gate leakage current, which is ascribed to hole-trapping in Mg-acceptors located at the p-GaN/AlGaN interface; (ii) this trapping process becomes less pronounced at high temperatures, due to a faster detrapping from the shallow Mg-related traps; (iii) the devices stressed at the same voltage and different temperatures show a similar initial gate leakage, due to the fact that in the analyzed regime, gate conduction is dominated by Fowler-Nordheim tunneling, a field-related, rather than thermally activated, pr...

Keywords: time; gate; time dependent; stress; dependent breakdown; positive temperature

Journal Title: Applied Physics Letters
Year Published: 2019

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