LAUSR

ABSTRACT Memristor technology has become an attractive option for use in-memory architectures, in-memory computing, and logic applications. Memristor crossbar array performance is dependent upon sneak paths. Our research characterises the sneak paths in crossbar arrays where the current can sneak through non-selected cells. We present equations for characterising sneak paths as a function of the size of the array, resistance values, input voltage, and I/O switch-vector. We also derive formulas to calculate the number of sneak paths in various array sizes and describe conditions that determine the length of the sneak paths. The resulting equations enable us to predict the sneak paths and sneak path currents for various array sizes to determine the constraints to the resistive memristor circuit. Our work characterising sneak paths provides boundary conditions for applications that use memristor crossbar arrays and provides insight to memristor crossbar testing.