LAUSR

ABSTRACT In semiconductor manufacturing systems, a time-constrained multi-cluster tool should be scheduled such that a wafer stays in a process chamber in a given time range to satisfy a wafer residency time constraint. In practice, activity time is subject to variation. It could lead to some fluctuation of wafer residency time in a process chamber. Hence, it is crucial to analyze how wafer residency time varies with activity time variation. This issue is especially challenging for multi-cluster tools. This work focuses on determining the exact upper bound of wafer sojourn time delay resulted from activity time variation for dual-arm multi-cluster tools. After discussing their dynamic behaviours, it presents a two-level real-time operational architecture and a real-time control policy. Based on them, this work derives for the first time an efficient algorithm to calculate the exact upper bound of wafer sojourn time delay in a process chamber. As a result, engineers can test whether a given schedule is feasible. Several examples of industrial significance are used to demonstrate the application of the proposed approach.