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In this study, the wafer warpage resulting from common source line tungsten (CSL W) is investigated in 3D NAND flash memory. It is found that the warpage is related to… Click to show full abstract
In this study, the wafer warpage resulting from common source line tungsten (CSL W) is investigated in 3D NAND flash memory. It is found that the warpage is related to the annealing conditions after CSL W deposition, and it reduces exponentially with increasing annealing temperature or linearly with increasing annealing time. This result shows that the effect of annealing temperature on warpage is greater than that of time. Consequently, spike annealing with a low thermal budget is proposed to achieve the desired reduction of warpage as long as the annealing temperature is adequate. This work provides an effective approach to solve the wafer warpage problem in 3D NAND flash memory manufacturing.
Journal Title: Semiconductor Science and Technology
Year Published: 2019
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