LAUSR

In February 2023, the annual ‘Olympic’ of the chip industry, ISSCC, returned to in-person meetings in San Francisco. As shown in Fig. 1, from the ISSCC 2023, we can see that the trend in IC design has shifted from pure digital to mixed-signal design, particularly in areas such as AI accelerator chips and quantum computing. Chips have also evolved from integrated circuits to integrated chips through modulelevel, function-level, and chip-level fusion, with compute-inmemory being the best embodiment of module-level and function-level fusion. Moreover, quantum computing was one of the major focuses of this ISSCC edition, with a separate paper session dedicated to cryo-CMOS for quantum computing. This emphasis on quantum computing may indicate that quantum chips are poised to make a big impact and could potentially spark a paper revolution like the compute-inmemory topic. To address the gap between academia and industry, ISSCC 2023 also introduces a new lecture session for innovations outside the traditional focus on solid-state circuits. Trend I: Walk in the middle of analog and digital Digitalization has been the main theme of IC development in the past 70 years[2]. However, with the slowing down of Moore's Law, the technology roadmap of continuously scaling the chip performance through process has gradually become unsustainable. In recent years, the trend of chip design, especially in computing chips, has gradually shifted from pure digital to mixed-signal design, particularly in areas such as AI accelerator chips and quantum computing chips. What is the underlying logic of this change in development trend? Bell's Law, proposed by Gordon Bell in 1972, states that every ten years, a new generation of computers (new programming platforms, new network connections, new user interfaces, and new usage patterns) will emerge, forming a new industry. The new generation of computers has new computing power characteristics, which pose new demands on chips and promote continuous innovation in bottom-level hardware chips. The computing power characteristics and demands of different eras determine the continuous evolution of chip product development modes, which is reflected in Makimoto's Wave. In 1987, Tsugio Makimoto, former chief engineer of Hitachi, proposed that the development of semiconductor products always alternates between standardization and customization, fluctuating about every ten years. The underlying balance between performance/power consumption and development efficiency behind Makimoto's Law is more of a rule refined through the product development cycle of the industry. Based on Bell's Law and Makimoto's Wave, designers explore the fundamental rules for the advancement of chips. The evaluation of chips mainly depends on the ‘PPA’ indicators: power, performance, and area. In the era of general-purpose computing dominated by CPUs, low power consumption and high performance (high precision) are difficult to achieve at the same time, with high performance (high precision) taking priority. Looking to the future, AI computing and quantum computing are becoming favorable supplements to CPU general-purpose computing. One major characteristic of AI computing and quantum computing is the reduced demand for data precision, which makes low-power computing based on relatively low-precision analog and mixed-signal chips possible and unifies low-power consumption and high performance in new-generation chips. Under this new underlying logic, a wave of innovative papers is emerging, with representative papers including JSSC 2019[3], IEEE Solid-State Circuits Magazine 2021[4], ISSCC 2023[5], and more. Looking to the future, as one of the ISSCC 2023 plenary talk speakers, Prof. Akira Matsuzawa said, "In the future, it will be important to develop computers such as AI processors and quantum computers whose operations are essentially analog, so mixed-signal technology is expected to develop even further." Trend II: From integrated-circuits to integrated-chips Based on the fundamental rules for the advancement of chips mentioned earlier, chips have evolved from integrated circuits to integrated chips, characterized by module-level fusion, function-level fusion, and chip-level fusion. The three levels fusion support each other and form a combined force to drive the innovation and development of the next generation chips. Module-level fusion is driven by demand in different scenarios. It integrates the functions of different circuit modules traditionally implemented into a single circuit module to achieve function fusion and performance breakthroughs. The recent development of the analog front-end signal processing SoC exemplifies this technology trend. For example, in wireless communication scenarios, one of the latest technology trends is to integrate the functionality of the traditional receiver mixer into the ADC. Through a high-performance ADC, the A/D sampling and RF received signal demodulation can be achieved simultaneously. One representative reference paper is JSSC 2020[6]. Module-level fusion is also reflected in the low-power front-end acquisition of biological signals, where a high dynamic range and low-noise delta-sigma ADC breaks the traditional architecture about amplifier connected with ADC, enabling low-power, small area, and high-precision biological signal acquisition[7]. Representative reference papers in ISSCC 2023 are Ref. [8−10].