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This work presents the design of an RS(31,27) Reed Solomon encoder for a 3.2 Gbps serial transmitter in 0.18 um CMOS technology. The proposed encoder is designed with a novel… Click to show full abstract
This work presents the design of an RS(31,27) Reed Solomon encoder for a 3.2 Gbps serial transmitter in 0.18 um CMOS technology. The proposed encoder is designed with a novel full parallel structure optimized for high speed and high stability. One data frame contains 2 interleaved RS(31,27) codes and thus it can correct at most 20 bits of consecutive errors. A corresponding decoder is implemented on Xilinx Kintex-7 FPGA.
Keywords:
gbps serial;
transmitter cmos;
encoder;
encoder gbps;
cmos technology;
serial transmitter
Journal Title: Journal of Instrumentation
Year Published: 2019
Link to full text (if available)
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Journal Title: Journal of Instrumentation
Year Published: 2019
Link to full text (if available)
Share on Social Media: Sign Up to like & get
recommendations!