LAUSR

This thesis concerns the development of a fully differential analog to digital converter (ADC) with successive approximation (SAR) for a monolithic pixel detector (MAPS) Spacepix-2 in 180 nm SoI CMOS technology. MAPS detectors represent the actual trend in high-energy physics experiments (HEP). Besides HEP experiments are MAPS detectors often used in medical and space applications. ADC placed under the column of the MAPS pixel matrix is called column ADC. A single ADC for a single column is used in standard architecture. Analog signals from pixels are digitized row by row. The main problem of the differential column SAR ADC design is a limited width determined by the pitch of the pixel. The Spacepix-2 pixel pitch is 60 μm. This thesis proposes a new SAR column ADC architecture in 8-bit and 10-bit versions, where each ADC has multiplexed input to two columns. The layout area is doubled to 120 μm. This new architecture helps achieve higher speed, linearity, low noise, and low power consumption of the proposed SAR ADC. The 8 bit column ADC reaches sampling rate 4 MSps, average power consumption is 200 μW from a 1.8 V power supply at ten frames per second readout frequency. The 10 bit version achieves the same parameters with the higher power consumption of 250 μW.