In this paper the results of Edge-TCT and I-V measurements with passive test structures made in LFoundry 150 nm HV-CMOS process on p-type substrates with different initial resistivities ranging from… Click to show full abstract
In this paper the results of Edge-TCT and I-V measurements with passive test structures made in LFoundry 150 nm HV-CMOS process on p-type substrates with different initial resistivities ranging from 0.5 to 3 kΩcm are presented. Samples were irradiated with reactor neutrons up to a fluence of 2·1015 neq/cm2. The depletion depth was measured with Edge-TCT. The effective space charge concentration Neff was estimated from the dependence of the depletion depth on bias voltage and studied as a function of neutron fluence. The dependence of Neff on fluence changes with initial acceptor concentration in agreement with other measurements with p-type silicon. A long term accelerated annealing study of Neff and detector current up to 1280 minutes at 60°C was made. It was found that Neff and current in reverse biased detector behave as expected for irradiated silicon.
               
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