In most of resolver-to-digital converters, it is necessary to detect the sinusoidal and cosinusoidal envelopes of rotor angle position from the amplitude-modulated signals the resolver outputs. Conventional synchronous envelope detection… Click to show full abstract
In most of resolver-to-digital converters, it is necessary to detect the sinusoidal and cosinusoidal envelopes of rotor angle position from the amplitude-modulated signals the resolver outputs. Conventional synchronous envelope detection methods usually adopt a microprocessor to generate excitation signal and sample resolver signals, which is easy to ensure the synchronization of sampling. However, these methods may result in too large consumption of microprocessor resources, especially when the excitation frequency is very high. In order to reduce the burden of the microprocessor, external excitation can be used instead, and the synchronization pulse for sampling trigger can usually be generated by comparing the externally generated carrier with a reference through comparison circuit. However, the unexpected factors in hardware may cause deviations of the synchronization pulse instants and thus affect the accuracy of the detected envelopes. In order to solve this problem, a novel strategy of synchronous envelope detection by using hardware circuits is proposed in this paper. First, error propagation of the unexpected factors to the synchronization pulse is minimized by optimizing the reference voltage for the comparison circuit. Second, the effects of the synchronization pulse instant deviations on the accuracy of the detected envelopes are minimized by optimizing the sampling phase of the resolver signals. Theoretical analysis indicates that high-accuracy synchronous envelope detection can be realized since the minimum effects of unexpected factors. Experimental results support the conclusion of theoretical analysis, and prove the effectiveness and feasibility of the proposed strategy.
               
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