In this study, an iterative reduction based heuristic algorithm (IRHA) based closed loop control and space vector PWM (SVPWM) control of the Z-source inverter are implemented in hardware. The third… Click to show full abstract
In this study, an iterative reduction based heuristic algorithm (IRHA) based closed loop control and space vector PWM (SVPWM) control of the Z-source inverter are implemented in hardware. The third harmonic addition method is used to realize the SVPWM structure in programmable embedded environment. The control parameters are optimally determined by IRHA to overcome the problem of instability. The controllers are implemented in single Field-Programmable Gate Array (FPGA) chip using hardware description language without help of any IP core units which increases speed, accuracy, compactness and cost efficiency. Furthermore, power consumption of the controllers is lower than a conventional ones which is prominent advantage of employing FPGAs. The effectiveness and accuracy of the control structure are verified by experimental results.
               
Click one of the above tabs to view related content.