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Analog Integrated Circuits Based on Wafer-Level Two-Dimensional MoS2 Materials With Physical and SPICE Model

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In this article, accurate physical and SPCIE model of wafer-level monolayer molybdenum disulfide (MoS2) device are developed to guide the devices and circuits design, which is the foundation of high-performance… Click to show full abstract

In this article, accurate physical and SPCIE model of wafer-level monolayer molybdenum disulfide (MoS2) device are developed to guide the devices and circuits design, which is the foundation of high-performance analog chip design. Moreover, the proposed model considers the non-ideality of thin films and the influence of Schottky contact with higher accuracy. The mean percentage error (MPE) of the physical model simulation and measurement results is 4.49%. Based on the SPICE model implemented in this article, the amplifier circuit and current amplifying circuits are implemented to verify the manufacturing process and accuracy of the device models, which shows the MoS2 is potential material to realize industrial applications. The MPE of the SPICE model simulation and measurement results is within 7.00% which can be utilized for our analog circuit design.

Keywords: analog integrated; spice model; mos2; model; wafer level

Journal Title: IEEE Access
Year Published: 2020

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