LAUSR

This paper proposes a novel approach in the offline Software-in-the-Loop (SIL) simulation technique to speed up the firmware development cycle of power electronics and enhance the firmware maintenance of commercial products. In the conventional SIL simulation process, Model-in-the-Loop (MIL) is always performed prior to the execution of SIL because it allows users to automatically generate C code for testing in the subsequent SIL. Furthermore, the target device can be programmed with the compiled files only if the simulation tools support specific models of control chips. In light of this, the goal to use SIL to validate firmware in early power electronics product development becomes more complex and limited due to the limited selection of simulation tools. In this paper, non-preemptive scheduling (NPS) and common firmware architecture (CFA) are explored to illustrate the integration of the application layer for implementing the proposed offline SIL. Users can directly use circuit simulation software that supports Dynamic-Link Library (DLL) to simultaneously develop source codes and verify the offline SIL process of the product. To further illustrate the practical application of the power electronics product in the microcontroller (MCU) mock model and the power stage circuit model, a single 300W power module composed of three single-phase quasi-resonant (QR) flyback current source converters connected in parallel and cascaded with an H-bridge unfolder is used as an example to execute offline SIL in the SIMULINK. Finally, a system-level experiment was conducted to validate the firmware of 16 power modules assembled in a 4.8 kW fuel cell (FC) grid-tie inverter system, which was modulated through the power management unit (PMU) and the monitoring graphical user interface (GUI).