In a 3L-VSI, to realize reference vector, maximum of six switching per sub-cycle are permitted. A similar condition is looked for in 3L-ZSI (z source inverter). The current continuous SVPWM… Click to show full abstract
In a 3L-VSI, to realize reference vector, maximum of six switching per sub-cycle are permitted. A similar condition is looked for in 3L-ZSI (z source inverter). The current continuous SVPWM methods of 3L-ZSI have adopted two approaches to meet the desired condition. These are a selection of sub-cycles generating six and eight switching employing correct volt-second balance. The sub-cycles generating eight switching has the demerit of increased losses. Here a new switching pattern has been proposed to optimize the number of switching. The dependency of the modulation index and sub-cycle duration on the switching frequency has also been discussed. With the increase in carrier frequency, the proposed PWM technique offers a decrease in switching losses compared to the existing ones. This leads to the improved efficiency of 3L-ZSI.To verify the efficacy of the proposed technique, simulation and prototype results are presented.
               
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