LAUSR

SRAM cells are widely used to design memory blocks of, e.g., caches, register files, and translation lookaside buffers. Depending on the SRAM application, the design requirements are different. For instance, in space applications, alongside energy efficiency, reliability is a main issue since the system is launched into space with a limited energy budget and stay exposed to high doses of radiation strikes for a long time. The Nwise cell has recently been proposed by the authors of this paper as the first highly reliable radiation hardened SRAM cell designed with 28nm FD-SOI. In this paper, inspired from the Nwise cell, we introduce another highly reliable radiation hardened SRAM cell, the Pwise cell, which is also designed with 28nm FD-SOI technology. Through comprehensive simulations of state-of-the-art cells, we show that both the Nwise and Pwise cells are competitive radiation hardened SRAMs to use in different memory blocks for space applications: (1) Both have the highest level of Single Event Upsets (SEU) tolerance capability for the temperature range deployed in space applications; further, both have the highest level of the tolerance capability to Multi Event Upsets (MEU). (2) Compared with the simulated cells that have comparable tolerance capability, the Nwise cell has low read delay and read power consumption, hence, it can be a good choice for space application cache designs, while the Pwise cell can be a proper candidate for space application register file designs since it has low write and read delay.