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A High-Efficiency Isolated PFC AC-DC Topology with Reduced Number of Semiconductor Devices

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A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this paper. This topology provides a high input power… Click to show full abstract

A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this paper. This topology provides a high input power factor (PF), soft-switching, and higher efficiency than existing isolated ac-dc converters. Furthermore, the proposed circuit has lower voltage rating requirements for the secondary side devices, which leads to a lower total cost and minimizes total converter losses. This article presents a theoretical analysis describing the complete characterization of this new topology, and experimental results on a 1-kW prototype showing high PF and efficiency throughout the operating range.

Keywords: high efficiency; number semiconductor; topology; pfc topology; semiconductor devices; efficiency

Journal Title: IEEE Journal of Emerging and Selected Topics in Power Electronics
Year Published: 2021

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