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A Near-Zero-Power Wake-Up Receiver Achieving −69-dBm Sensitivity

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This paper presents the design of a wake-up receiver (WuRX) that both improves sensitivity and reduces power over prior art through a multi-faceted design featuring an off-chip impedance transformation network… Click to show full abstract

This paper presents the design of a wake-up receiver (WuRX) that both improves sensitivity and reduces power over prior art through a multi-faceted design featuring an off-chip impedance transformation network with large passive voltage gain, an active envelope detector with high input impedance to facilitate large passive voltage gain, a low-power precision comparator, and a low-leakage digital baseband correlator. Implemented in a 180-nm silicon on insulator CMOS process using dynamic threshold-voltage MOSFET (DTMOS) devices, the OOK-modulated WuRX operates at 113.5 MHz and achieves a sensitivity of −69 dBm, while consuming just 4.5 nW from a 0.4-V supply.

Keywords: wake receiver; power; sensitivity; zero power; near zero

Journal Title: IEEE Journal of Solid-State Circuits
Year Published: 2018

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