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Power-Efficient Design Techniques for mm-Wave Hybrid/Digital FDD/Full-Duplex MIMO Transceivers

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This article describes system and circuit design techniques to enhance power efficiency and incorporate new features in millimeter-wave multi-input–multi-output (MIMO) transceivers. The higher peak-to-average power ratio (PAPR) of the signal… Click to show full abstract

This article describes system and circuit design techniques to enhance power efficiency and incorporate new features in millimeter-wave multi-input–multi-output (MIMO) transceivers. The higher peak-to-average power ratio (PAPR) of the signal transmitted from a digital beamformer (DBF) or a fully connected hybrid beamforming (FC-HBF) transmitter compared with the conventional partially connected hybrid beamforming (PC-HBF) transmitter is identified for the first time. It is then shown that when a power amplifier (PA) with better back-off efficiency than Class-A PA is used, the overall power efficiency of the FC-HBF is superior to the PC-HBF for a given antenna geometry. Second, a new mechanism for built-in dual-band, per-element self-interference cancellation (SIC) is introduced to enable multi-antenna frequency-division-duplex (FDD) and full-duplex (FD) operation. Such SIC can only be supported in the proposed FC-HBF architecture. Several innovative circuit concepts are introduced, including low-loss wideband antenna interface design, dual-band power combining PA, dual-band RF-SIC design, and bidirectional MIMO signal path design. To demonstrate these techniques, a 28-/37-/39-GHz bidirectional two-stream front-end single-element prototype is designed in the 65-nm CMOS. The prototype can be configured as a transmit (TX) or receive (RX) element in DBFs or FC-HBFs which can in turn be configured to support TDD, FDD, or FD operation. The front-end achieves 16-/11-dB RX gain, 6.2-/7-dB NF, 15.8-/16.8-dBm saturated PA output power, and 20%/21.6% peak PA efficiency in the 28-/37-GHz bands. Extensive characterization results are presented to compare the energy efficiencies of the PC-HBF and FC-HBF architectures. The prototype is also characterized in the FDD/FD mode and achieves 36-dB peak RF-domain SIC and better than 26-dB RF-domain SIC across 0.5-GHz modulation bandwidth.

Keywords: hbf; power; duplex; design techniques; mimo transceivers; design

Journal Title: IEEE Journal of Solid-State Circuits
Year Published: 2020

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