LAUSR

This article presents a fully integrated RF energy harvester (EH) with 30% end-to-end power harvesting efficiency (PHE) and supports high-output voltage operation, up to 9.3 V, with a 1.07-GHz input and under the electrode model for neural applications. The EH is composed of a novel ten-stage self-biased gate (SBG) rectifier with an on-chip matching network (MN). The SBG topology elevates the gate-bias of transistors in a nonlinear manner to enable higher conductivity. The design also achieves $>$ 20% PHE range of 12 dB. The design was fabricated in 65-nm CMOS technology and occupies an area of 0.0732 mm2 with on-chip MN. In addition to standalone EH characterization measurement results, animal tissue stimulation test was performed to evaluate its performance in a realistic neural implant application.