LAUSR

To unlock the full potential of monolithic gallium nitride (GaN) power integrated circuits, this article explores the feasibility of developing efficient and reliable on-chip gate driving and level shifting solutions, which fundamentally facilitate the on-chip implementation of GaN power circuits. As results, a self-bootstrapped hybrid (SBH) gate driving scheme and its circuitry are developed, which achieve rail-to-rail dynamic gate driving in normal operation and robust static gate driving in large transient moments. Meanwhile, an auto-lock auto-break (A2) level shifting technique is proposed to convert the gate driving control signals from low-voltage (LV) to high-voltage (HV) domains, without requiring any p-type devices. This enables the on-chip operation of high-side power switches and makes synchronous rectification possible. On-chip temperature sensing is implemented to monitor junction temperature directly at low circuit complexity and power and cost overheads, facilitating thermal protection at high power density. Furthermore, on-die dead-time control is presented to optimize zero voltage switching (ZVS) for high efficiency. All the techniques and circuits are demonstrated in a monolithic asymmetrical half-bridge (AHB) power converter on a GaN-on-SOI process. It achieves direct 48V/1V dc–dc conversion with a maximum load current of 5 A and a current density of 1.1 A/mm2. Among the existing monolithic GaN power ICs capable of on-chip synchronous rectification, it achieves the shortest rising- and falling-edge gate driving delays of 11.6 and 14.0 ns. Despite running doubled numbers of on-chip power transistors and gate drivers, it only consumes 70-mW static power.